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| ACS151MS November 1997 Radiation Hardened 8-Input Multiplexer Description The Radiation Hardened ACS151MS is an 8-Channel Multiplexer having three binary control inputs and an active low enable input. The three binary input signals select the input from 1 of 8 channels. Complementary data outputs are provided for ease of system design. If the enable input is high, the input signals are disregarded, the Y output is set high and the Y output is set low. All inputs and outputs are buffered and are designed for balanced propagation delay and transition times. The ACS151MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the ACS151 are contained in SMD 5962-97640. A "hot-link" is provided on our homepage with instructions for downloading. http://www.intersil.com/data/sm/index.htm Features * QML Qualified Per MIL-PRF-38535 Requirements * 1.25Micron Radiation Hardened SOS CMOS * Radiation Environment - Latch-up Free Under any Conditions - Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si) - SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day - SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2) * Input Logic Levels . . .VIL = (0.3)(VCC), VIH = (0.7)(VCC) * Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA * Quiescent Supply Current. . . . . . . . . . . . . . . . . . .400A * Propagation Delay - Enable to Output . . . . . . . . . . . . . . . . . . . . . . . . . 12ns - Input or Address to Output . . . . . . . . . . . . . . . . . 20ns Applications * Sensor Input Selection * Data Routing * High Frequency Switching Ordering Information SMD PART NUMBER 5962F9764001VEC N/A 5962F9764001VXC N/A N/A INTERSIL PART NUMBER ACS151DMSR-02 ACS151D/Sample-02 ACS151KMSR-02 ACS151K/Sample-02 ACS151HMSR-02 TEMP. RANGE (oC) -55 to 125 25 -55 to 125 25 25 PACKAGE 16 Ld SBDIP 16 Ld SBDIP 16 Ld Flatpack 16 Ld Flatpack Die CASE OUTLINE CDIP2-T16 CDIP2-T16 CDFP4-F16 CDFP4-F16 N/A Pinouts ACS151 (SBDIP) TOP VIEW I3 1 I2 2 I1 3 I0 4 Y5 Y6 E7 GND 8 16 VCC 15 I4 14 I5 13 I6 12 I7 11 S0 10 S1 9 S2 ACS151 (FLATPACK) TOP VIEW I3 I2 I1 I0 Y Y E GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC I4 I5 I6 I7 S0 S1 S2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999 File Number 4430 1 ACS151MS Die Characteristics DIE DIMENSIONS: Size: 2390m x 2390m (94mils x 94mils) Thickness: 525m 25m (20.6mils 1mil) Bond Pad: 110m x 110m (4.3mils x 4.3 mils) METALLIZATION: Type: Al Metal 1 Thickness: 0.7m 0.1m Metal 2 Thickness: 1.0m 0.1m SUBSTRATE: Silicon on Sapphire (SOS) SUBSTRATE POTENTIAL: Unbiased Insulator BACKSIDE FINISH: Sapphire PASSIVATION: Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30m 0.15m SPECIAL INSTRUCTIONS Bond VCC First ADDITIONAL INFORMATION: Worst Case Density: <2.0 x 105 A/cm2 Transistor Count: 166 Metallization Mask Layout ACS151MS I2 I3 VCC I4 I1 I5 I0 I6 Y I7 Y S0 E GND S2 S1 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 2 |
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